AMD codenamed its latest design "Bulldozer", and it features an x86 core design that is radically different from anything we've seen from either processor giants. AMD's current architecture, the K10(.5) "Stars" is an evolution of the more market-successful K8 architecture, but it didn't face the kind of market success as it was overshadowed by competing Intel architectures. We will be explaining each one of them in the next pages.įigure 2: New features introduced by K10 architecture.AMD is finally going to embrace a truly next generation x86 processor architecture that is built from ground up. In Figure 2, you can see a list of new features introduced by K10 architecture. AMD is calling this new feature “AMD Wide Floating Point Accelerator.”
Intel processors based on Core microarchitecture (Core 2 Duo, for example) also have 128-bit internal datapaths, while Intel processors based on Netburst microarchitecture (Pentium 4 and Pentium D) have a 64-bit internal datapaths. The new 128-bit datapath makes K10 microarchitecture faster to process SSE instructions that manipulate 128-bit data compared to K8 microarchitecture. So, when executing an instruction that manipulated a 128-bit data, this operation had to be broke down into two 64-bit operations. This was a problem for SSE instructions, since SSE registers, called XMM, are 128-bit long. On previous CPUs based on K8 microarchitecture the internal datapath was of 64 bits only.
Intel CPUs based on Core microarchitecture, like Core 2 Duo, also fetches 32 bytes per clock cycle. The fetch unit fetches 32 bytes (256 bits) of data per clock cycle from the L1 instruction cache – this is the double CPUs based on K8 architecture could fetch per clock cycle.
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